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ArticlesRobust Mobile Video Transmission Using DSTS-SP via Three-Stage Iterative Joint Source-Channel Decoding
• Amaad Khalil1, Nasru Minallah1, Ishtiaque Ahmed2, Khadem Ullah2, Jaroslav Frnda3,4,*, and Jan Nedoma4

Human-centric Computing and Information Sciences volume 11, Article number: 42 (2021)
https://doi.org/10.22967/HCIS.2021.11.042

Abstract

The last decade has witnessed a great growth in the number of cellular users, and consequently there is a prominent inclination towards wireless and mobile communication by the researchers. This research work considers the optimization of joint source and channel coding for the H.264/AVC (advanced video coding) stream. The source encoded video is serially transmitted using concatenated source bit coding (SBC) assisted by Rate-1 Precoder through a non-coherent differential space-time spreading (DSTS) scheme with multi-dimensional sphere packing (SP) modulation. More specifically, the Precoder is invoked as an intermediate encoder having an infinite impulse response which assists in the distribution of information across the decoders. Furthermore, the Precoder enhances the iterative decoding performance by splitting the overall system’s iteration into inner and outer iterations. The H.264/AVC stream is highly compressed and yields residual redundancy which limits the iterative decoding performance. Therefore, for enhancing the performance of iteratively decoded systems, artificial redundancy is incorporated along the video bit stream using the SBC. Specifically, the iterative decoding provides better bit error ratio and also enhances the perceptual peak signal-to-noise ratio (PSNR) metric. Extrinsic information transfer (EXIT) chart analysis is done to measure the convergence behavior of our proposed system. The effect of minimum Hamming distance ($d_{H,min}$) on the attainable performance of the joint source-channel coded video sequence is investigated. Quantitatively, our proposed $DSTS-SP-Precoder-SBC_{[5\mkern18mu15]}$ scheme having $d_{H,min}=6$ exhibits a noticeable improvement of about 22 dB gain at the PSNR degradation of 2 dB, against the $DSTS-SP-Precoder-SBC_{[2\mkern18mu6]}^*$ benchmarker having $d_{H,min}$=1 for the correlated Rayleigh fading channel.

Keywords

Correlated Rayleigh Environment, Mobile Communication System, Robust-Error Correction Codes, Source Bit Coding, SP aided DSTS, Three-Stage Iterative Decoding, Video Streaming

Introduction

Nowadays multimedia communication systems are getting enormous attention in every field of life due to the increase in its various capabilities and customer demands. Multimedia communication for the available bandwidth resources is becoming the most exciting area and a key challenge for wireless researchers [1]. Reliable real-time transmission and efficient video quality are the main features for different video streaming applications such as video conferencing, satellite transmission, mobile phones, medical and military imaging system [2]. Audiovisual transmission with high data rate and better quality is a difficult task due to the randomness in wireless channel.
Digital transmission systems are designed for the two main objectives, namely error resilience and coding efficiency. Source coding is employed to compress the video bitstream by removing the redundancy for coding efficiency. The compressed video bitstream is more exposed to channel noise [3] which could harm the quality of experience at the receiver end. Therefore, channel coding in the form of different error correction codes (ECC) is applied to protect the video stream from the effects of wireless channel. 1n 1990, discovery of turbo codes made possible to attain near Shannon’s channel capacity. In turbo codes, the iterative exchange of extrinsic information allowed to use different combinations of ECC [4]. The iterative decoding technique helps in improving the error resilience of the transmission system. Shannon’s theorem states that the separate source and channel encoders has limited advantages for practical transmission system [5]. However, the source codes are designed without taking in consideration the channel codes, hence resulting in minimal performance of the video system.
Iterative decoding scheme using turbo principles motivated the researchers to combine source and channel coding, yielding the concept of iterative joint source and channel decoding (IJSCD) [6]. In [7], investigations revealed that IJSCD provides better results in the form of low Bit Error Rate (BER) as compared to non-iterative decoding schemes. Artificial redundancy is added in source coded stream by employing channel coding to eliminate the channel errors. As a result, coding efficiency is compromised with the increase in error resilience property.
Furthermore, the study in [8] discusses the optimized performance of IJSCD system using Rate-1 inner encoder and recursive non-systematic convolutional codes as outer encoder with a code rate of 1/3. Similarly, linear block codes of rate 4/5 are employed for IJSCD scheme with inner irregular channel encoder to attain bitstreams from the quantized symbols [9]. A scheme of serially concatenated codes employing IJSCD was advocated in [10]. A novel approach of a posteriori probability (APP) for soft-input soft-output (SISO) decoder is employed to attain better performance in [11], for the beneficial exploitation of residual redundancy. In [12], researchers discussed that the performance of IJSCD is enhanced by adding artificial redundancy to the encoded video bitstream. Against this background, the aim of this treatise is to attain better iterative performance using additional redundancy with the aid of SBC scheme for the three-stage system.
We employ the H.264/AVC(advanced video coding) for encoding the “Akiyo” video frames to compress source coded bitstream. The techniques of intra and inter predictive coding along with heterogeneous variable length coding (VLC) are considered in the H.264/AVC standard for attaining higher compression efficiency [13]. In the H.264/AVC, occurrence of even single bit error in one video frame propagates to the neighboring frames corrupting the entire sequence. For this, an error resilient feature known as data partitioning (DP) [14], is used to reduce the effects of channel errors. DP generates three different types of streams namely A, B and C with different levels of importance [14]. The video is transmitted using multiple-input multiple-output (MIMO) scheme, a low complexity technique requiring less transmission power. Differential space time spreading (DSTS) is a simpler non-coherent MIMO scheme that does not require channel state information (CSI) [15]. Sphere packing (SP) modulation is incorporated with DSTS scheme to get better performance. The SP aided DSTS scheme provides low complexity MIMO scheme with a mere 3 dB performance lag in comparison to the coherent systems requiring channel information.
In view of this, the important contributions of our work include:

Performance evaluation of the three-stage turbo-detected joint source-channel decoding system using DSTS-SP transmission mechanism.

Investigating the effects of minimum Hamming distance ($d_{H,min}$) on the achievable performance of three-stage system.

Evaluating the Mapping-I and Mapping-II techniques for incorporating redundancy in the source encoded stream for enhancing reliability of the iterative system.

We present the detailed related work in Section 2. H.264/AVC is explained in Section 3 along with the transmission mechanism employed for the proposed three-stage system. Section 4 presents source bit coding (SBC) and the proposed system’s overview is discussed in Section 5. Section 6 portrays the three-stage iterative decoding followed by the extrinsic information transfer (EXIT) chart analysis in Section 7. The performance and results are illustrated in Section 8. Finally, the conclusion of our work is done in Section 9.

Related Work

In [16], a low complex three-stage MIMO demapping scheme is employed for joint channel estimation which provides better performance using the channel state information. Authors in [17] extended the investigations on three-stage system by incorporating the combinational gain technique of layered steered space-time codes and deployed antenna arrays for transmission of the encoded video. In [18], multistage decoding is proposed for low-density parity-check (LDPC) codes. The results demonstrate that multistage provides better results for frame error rate, BER and convergence behavior. In [19], data partitioned H.264/AVC is transmitted using recursive systematic codes over Rayleigh channel. SP aided DSTS scheme is employed and the results show that the mutual information exchange is favorable in correcting the errors. In [20], convolutional concatenated codes are employed for investigating the rate loss and coding gain is attained with the iterative soft decoding for Reed Solomon codes instead of recursive codes. In [21], H.264/AVC stream is transmitted using SP and DSTS scheme. Artificial redundancy is added in the coded stream through SBC algorithm and significant improvement is observed in the BER and peak signal-to-noise ratio (PSNR) graphs. In [22], authors investigate the H.264/AVC transmission scheme using different hierarchical modulation schemes. The proposed scheme in [22] is employed with adaptive modulation scheme that benefits the transmission system with an increase of 15 dB PSNR. In [23], self-concatenated convolutional (SECC) coding performance is compared with convergent serial concatenated and non-convergent serial concatenated codes. The EXIT charts analysis advocates the SECC coding. In [24], joint source-channel decoding (JSCD) scheme is proposed for image transmission using arithmetic code as the channel code. The proposed system provides a beneficial gain of 4–8 dB compared to the traditional separate source-channel decoding. The incorporation of DSTS-SP to SECC coding was done in [25], and the performance curves advocated the proposed scheme over the simple SECC coding dispensing with the DSTS-SP. Minallah et al. [26] discussed the convergent and non-convergent behavior of three different schemes using iterative source-channel coding for the H.265 codec. It was concluded that convergent coding schemes outperform the non-convergent schemes. Authors in [27] used irregular convolutional codes (IRCC) as channel codes for an iterative system aided with DSTS-SP. IRCC performance was found better than the regular convolutional codes using the DP H.264 encoder. Authors in [28] proposed a novel source codec for robust mobile speech communication and simulated it for the Rayleigh channel. An algorithm based on orthogonal frequency division multiplexing for reliable and robust multi description video coding was proposed in [29]. The algorithm was capable enough to reduce the packet loss rate of the video image transmission system. Context-aware mobile video strategy is discussed in [30] which uses the 5G-air-simulator for realistic performance measurements.

H.264/AVC and SP-DSTS Transmission Mechanism

In recent years, different compression techniques have been developed due to the efforts of academia and industries in video coding area. In 2003, H.264/MPEG-4 AVC was developed with the combined efforts of ITU-T and ISO, providing good video quality in comparison to the previous standards at low bit rate [31]. It is a block-oriented motion compensation-based video codec standard. H.264 saves up to 50%-bit rate as compared to its previous coding standards, providing major improvements in compression. Nowadays, 91% of video industry developers use this standard for video compression and recordings [32].
In H.264/AVC, the essential components are video encoder and video decoder as shown in Fig. 1. While each block of video encoder has its counterpart on the video decoder side. It is important to note that the encoder and decoder are able to cooperate with each other. Encoder takes video as input and then outputs an encoded bitstream. Partition, Prediction, Transform and Entropy are the main blocks of video encoder [33]. Initially, video frame is divided into slices using partition and each slice is further broken down into small rectangular blocks called macro blocks (MB). Video codec processes one MB of video frame at a time. In Prediction block, residual MB is obtained by subtracting the predicted MB from original MB. Residual MB is quantized using Transform block and converted into bitstream through Entropy encoding block, which is either stored in memory or transmitted through channel [34].

Fig. 1. Building block of video codec.

The H.264 decoder consists of entropy decoder, inverse transform, prediction, and reconstruction modules. The incoming bitstreams are first allowed to the entropy decoder to attain quantized coefficients. The inverse transform uses the quantized coefficients to generate residual MB. The reconstructed MB is obtained by adding the predicted MB to residual MB. The current picture frame is reconstructed with deblocking filter. Future pictures may use this picture as a reference picture [35].In H.264/AVC, each video frame is divided into group-of-pictures (GOP) and slices while slices are further sub-divided into MBs as shown in Fig. 2. The three partitions A, B and C supported by the H.264/AVC are discussed below:

Type A partitions contain the most vulnerable and sensitive information of the encoded video. This partition carries header information, MB types, motion vectors and quantization parameters. If this partition is corrupted then the partition B and C are not valuable and the entire slice is considered as corrupted.

Type B partitions contains MB coded block pattern (CBP) bits, MB coefficients and transform coded non-zero coefficients. In intra-frame encoding regions, erroneous bits of certain MBs are recovered by switching off inter-frame predictions. This partition encodes each slice with the fewest bits owing to the fewer fractions of MB iterations.

Type C partitions carries inter-frame CBP bits, motion compensated error residual (MCER) and motion compensated prediction information. In the H.264 encoding, intra-frame MCER and intra-frame CBP bits are encoded for the intra-frame prediction mode.

In our designed system, transmission mechanism consists of SP modulation and low complexity diversity channel gain technique known as DSTS. MIMO channel estimation with high accuracy requires complex receivers. Coherent detection schemes work on training symbols and use CSI [36]. The DSTS symbols work differentially between successive symbols during its encoding and decoding without requiring CSI. SP modulation scheme is used to attain diversity gain. In SP aided DSTS scheme, the symbols are transmitted from multiple antennas to achieve maximum coding rate by maximizing the Euclidean distance between the SP symbols [36]. The SP modulation based on two orthogonal transmit antennas of size (2×2) using space-time block codes (STBCs) is represented as

$G_2(x_1,x_2)= \left\lbrack \matrix{x_1 & x_2\cr x_2^* & x_1^*} \right\rbrack$(1)

In above equation, complex conjugate of the symbol is represented by (*), column represents the spatial dimension while temporal dimension is represented by the rows for two successive time slots. The transmitter chooses the modulated signals from available L legitimate space-time signals. The error resilience feature of the proposed system is enhanced by employing SP modulation [37].

Fig. 2. The proposed system design.

Fig. 3. Block diagram of DSTS system using twin antennas.

The DSTS encoding consists of two main steps. Firstly, differential encoding is performed and then time spreading takes place for transmission. Fig. 3 represents the two differentially encoded symbols transmitted through two antennas within two time slots.
In DSTS aided two antenna encoding scheme, initially at instant $t=0$, reference symbols $v_0^1$ and $v_0^2$ are transmitted that carry no information and forwarded to STS encoder using two antennas.For time $t≥1$, modulator or mapper receives $2B$ bits block generated using $2B-ary$ constellation and converts it to $symbolsx_t^k wherek=1,2$. The differentially encoded symbols $v_t^1$ and $v_t^2$ are given by Equation (2) and Equation (3) as

$v_t^1=\frac{(x_1×v_{t-1}^1+x_2×v_{t-1}^{2*})}{\sqrt{(|v_{t-1}^1 |^2+|v_{t-1}^2|^2)}}$(2)

$v_t^2=\frac{(x_1×v_{t-1}^2+x_2×v_{t-1}^{1*})}{\sqrt{(|v_{t-1}^1 |^2+|v_{t-1}^2|^2)}}$(3)

The complex conjugate operation is represented by superscript *. The spreading codes denoted by $c_1$ and $c_2$ are used to spread the differentially encoded symbols from both antennas. The $c_1$ and $c_2$ codes are generated from the same spreading code $c$. Walsh Hadamard coding along with code concatenation rule makes these spreading codes orthogonal. This technique produces longer codes which proportionately reduces the throughput of each antenna [38]. The differentially encoded information stream is distributed into two half rate steams using both antennas. The consecutive two symbols are transmitted as shown in Fig. 4 and represented by Equations(4) and (5) as

$y^1=\frac{1}{\sqrt{2}}(c_1.v_t^1+c_2.v_t^{2*})$(4)

$y^2=\frac{1}{\sqrt{2}}(c_1.v_t^2+c_2.v_t^{1*})$(5)

Fig. 4. STS scheme for transmitting 2 bits using two transmit antennas.

Source Bit Coding

Fingscheidt and Vary[39] introduced the source bit source decoding (SBSD) and SBC techniques. SBSD exploits the natural redundancy to improve the convergence behavior of iterative decoding. Advanced source coding technique results in better compression and leaves limited redundancy in the source coded stream. This improves the overall performance of the system by compromising on channel errors with optimal results. The proposed SBC rate $r =[N/N+1]$ is deployed with resultant codeword $[N+1]$ bits. The $d_{H,min}$ between the “$N$” bits source codeword is 2. This is the necessary condition for obtaining highest source entropy given as $H(X)=L_{SBSD}^{extr}=1$, which gives perfect a priori information as input to the SBSD.

Mapping-I
In our SBC encoding technique, first of all for the “$N$” bits of the source word, a redundant bit $r_d$ is generated by XOR function as expressed below.

$r_d=[b(1)⊕b(2)…⊕b(N)]$(6)

The XOR operation is represented by ⊕. The total [$N+1$] SBC encoded source codeword combinations are created by incorporating redundant bit $r_d$ at different positions of the SBC as shown in Table 1. All these SBC encoded codewords have $d_{H,min}$ of 2.

Table 1. Mapping-I codewords
Symbol Codewords C1 Codewords C2 Codewords C3 Codewords C_(N+1)
$S_1$ $r_1 b_1 b_2 b_3…b_N$ $b_1 r_1 b_2 b_3…b_N$ $b_1 b_2 r_1 b_3…b_N$ $b_1 b_2 b_3…b_N r_1$
$S_2$ $r_2 b_1 b_2 b_3…b_N$ $b_1 r_2 b_2 b_3…b_N$ $b_1 b_2 r_2 b_3…b_N$ $b_1 b_2 b_3…b_N r_2$
$S_3$ $r_3 b_1 b_2 b_3…b_N$ $b_1 r_3 b_2 b_3…b_N$ $b_1 b_2 r_3 b_3…b_N$ $b_1 b_2 b_3…b_N r_3$
Mapping-II
In Mapping-II SBC scheme, steady increase in $d_{H,min}$>2 is achieved by increasing both $K$ and $N$ of $SBC_{[KN]}$ while keeping the overall rate constant. The two main steps of encoding $K$ to $N$ bits using this approach are discussed below:

First step: The total number of redundant bits $I=[(m-1)xK]$ are obtained by concatenating the source $K$ bits ($m-1$) times to the source bits.

Second step: The second set of redundant bits are generated by calculating XOR of the $K$ source bits and setting each bit of $K$ equal to 0 sequentially for obtaining each redundant bit as shown in Table 2.

Table 2. Mapping-II SBC scheme
First step Second step
Input source bits $b_1 b_2 b_3 b_4….b_k$ $b_1 b_2 b_3….b_k$ $b_1^,b_2^,b_3^,b_4^,….b_k^,$
Output $b_1^,=(0⊕b_2⊕b_3⊕b_4….b_K)$
$b_2^,=(b_1⊕0⊕b_(3 )⊕b_4….b_K)$
$b_3^,=(b_1⊕b_2⊕0⊕b_4….b_K).$
$b_K^,=(b_1⊕b_2⊕b_3….b_(K-1)⊕0)$

System Overview

The diagram of proposed H.264/AVC video codec transmission using three-stage decoding with DSTS aided SP scheme is shown in Fig. 2. H.264/AVC video is partitioned into A, B and C and N source coded symbols are transmitted. The employed SBC scheme encodes $M=2$ bit input symbols with Rate-1/3 and as a result $M'$=6 bits are yielded. Random bit $interleaverΠ_out$ is used to interleave the encoded bits and then these bits are fed to the Precoder. The second random bit interleaver $Π_{in}$ is used to interleave the Precoder encoded bits into $r'$ that are passed to SP modulator as shown in Fig. 2. The $B$ number of encoded bits $b=b_0,b_1,b_2,….b_(B-1)∈0,1$ are mapped by SP modulator to $v=map_{sp} (b)∈V, where B=log_2⁡(L)$. The set of legal SP constellation points are represented by L as discussed in [16]. Here in our proposed SP modulation scheme, $B=log_2(16)=4$ bits per SP symbols are transmitted through two antennas using different time slots with the aid of DSTS scheme. The designed video transmission system uses Rayleigh fading with a Doppler frequency $f_D$=0.01 (Table 3). Table 4 includes the inner and outer rates of the various three-stage error protection schemes.

Table 3. System parameters

System parameter Value
Video source coding H.264/AVC
Source bit rate 64 kbps
Baud rate 96 kbps
Frame rate 15 fps
Per frame slices 9
Number of MB’s per slice 11
Intra-frame MB 3
Modulation scheme SP
MIMO scheme DSTS
Number of transmitters 2
Intermediate channel coding Rate-1 Precoder
Overall code rate 01월 03일
Normalized Doppler frequency 0.01

Table 4. Code rate of the different proposed error correction schemes
S. No Code rate
Outer code Inner code Overall system
1 $DSTS-SP-Precoder-SBC_{[2\mkern18mu6]}^*$ $SBC_{[2\mkern18mu6]}^*$ Rate-1 Precoder $Rate-\frac{1}{3}$
2 $DSTS-SP-Precoder-SBC_{[2\mkern18mu6]}$ $SBC_{[2\mkern18mu6]}$ Rate-1 Precoder $Rate-\frac{1}{3}$
3 $DSTS-SP-Precoder-SBC_{[3\mkern18mu9]}$ $SBC_{[3\mkern18mu9]}$ Rate-1 Precoder $Rate-\frac{1}{3}$
4 $DSTS-SP-Precoder-SBC_{[4\mkern18mu12]}$ $SBC_{[4\mkern18mu12]}$ Rate-1 Precoder $Rate-\frac{1}{3}$
5 $DSTS-SP-Precoder-SBC_{[5\mkern18mu15]}$ $SBC_{[5\mkern18mu15]}$ Rate-1 Precoder $Rate-\frac{1}{3}$
In this research work, different transmission schemes are considered with varying outer SBC rates. EXIT chart analysis is done for these SBC schemes with $d_{H,min}≥2$ while $d_{H,min}=1$ is set for the benchmarker as shown in Table 5.
The three-stage iterative system design consists of inner and outer iterations while the two stage iterative schemes have only one iterative loop. In the designed three-stage iterative scheme, the inner iterative loop consists of inner SP decoder and intermediate Precoder decoder while iterative loop between the intermediate Precoder decoder and outer SBC decoder is termed as the outer iteration. The overall system iteration is a specific collection of inner iterations followed by outer iterations.
Improvements in the BER and PSNR performances of the H.264 encoded video can be attained by using three-stage system design in the JSCD environment. More specifically, the inner and outer iterations of the three-stage system become favorable and enhance the performance over the traditional two-stage system. We invoke a Precoder between the outer and inner iterative components which results in a three-stage iterative system.

Table 5. SBC with corresponding Symbols and $d_{H,min}$
Source bit coding type Symbols in decimal $d_{H,min}$
$Rate-\frac{1}{3} SBC_{[2\mkern18mu6]}^*$ {0, 16, 32, 48} 1
$Rate-\frac{1}{3} SBC_{[2\mkern18mu6]}$ {0, 22, 41, 63} 3
$Rate-\frac{1}{3} SBC_{[3\mkern18mu9]}$ {0, 78, 149, 219, 291, 365, 438, 504} 4
$Rate-\frac{1}{3} SBC_{[4\mkern18mu12]}$ {0, 286, 557, 819, 1099, 1365, 1638, 1912, 2183, 2457, 2730, 2996, 3276, 3538, 3809, 4095} 5
$Rate-\frac{1}{3} SBC_{[5\mkern18mu15]}$ {0, 1086, 2141, 3171, 4251, 5285, 6342, 7416,  8471, 9513, 10570, 11636, 12684, 13746, 14801, 15855, 16911, 17969, 19026, 20076, 21140, 22186,  23241, 24311, 25368, 26406, 27461, 28539, 29571, 30653, 31710, 32736} 6

Three-Stage Iterative Decoding

Our proposed design system consists of three-stage joint optimized iterative source-channel decoders. SBC decoder, Precoder decoder, and multi-dimensional SP demapper are serially concatenated and iterative decoding is adopted for an enhanced performance. The mutual information (MI) iteratively exchanges in the proposed system and enhances the BER and PSNR of the system. In the outer iteration, SBC decoder and Precoder decoder mutually exchange the extrinsic log-likelihood ratios (LLRs) on the receiving side. Such LLRs will continue exchanging till the system achieves the perfect convergence. For convenience, we represent the LLR values of each respective bit by variable L(.). For simplicity, these LLRs corresponding to the SBC decoder, Precoder, and SP demapper are distinguished with the subscripts 1, 2, and 3 respectively, for our three-stage design. The a priori, extrinsic, and a posteriori information are represented by subscript a, e, and p, respectively.

Inner Iteration
DSTS decoder receives the complex symbols having $B=4$ number of precoded bits per SP symbol from the wireless channel and demaps the symbols to their respective LLR representations at the receiver end as shown in Fig. 2. The extrinsic LLR information $L_e^3 (r)$ is obtained by subtracting the a priori LLR information $L_a^3 (r)$ given by Precoder decoder from the output of SP demapper which is a posteriori LLR information $L_p^3 (r)$. The soft-bitinterleaver $∏$ is located in the middle of the SP demapper and Precoder decoder to deinterleave the extrinsic LLR information $L_e^3 (r)$. The deinterleaved LLRs are fed to Precoder decoder and a posteriori LLR $L_p^2 (r)$ is generated by using the MAP algorithm. The extrinsic LLRs $L_e^2 (r)$ of the Precoder decoder are created by subtracting the input a priori LLRs $L_a^2 (r)$ from the a posteriori LLRs $L_p^2 (r)$. The extrinsic LLR information $L_e^2 (r)$ is feedback to the SP decoder as a priori LLRs $L_a^3$ (r) after the interleaving operation. SP demapper benefits from these a priori LLRs $L_a^3 (r)$ and provides improved extrinsic information for the Precoder decoder in next iterations.

Outer Iteration
SBC and Precoder decoders iteratively exchange extrinsic information between each other and constitutes an outer iteration. The a priori LLRs $L_a^2 (s)$ are subtracted from the Precoder demapper’sa posteriori LLRs $L_p^2 (s)$ providing extrinsic LLRs $L_e^2 (s)$. These LLRs are deinterleaved using the interleaver $∏$ out and passed as a priori LLRs to the SBC decoder $L_a^1 (s)$. The a posteriori LLR $L_p^1 (s)$ is yielded by the SBC decoder and extrinsic LLR $L_e^1 (s)$ is generated by subtracting $L_a^1 (s)$ from LLRs $L_p^1 (s)$. The extrinsic LLRs attained after SBC decoding are interleaved and allowed to the Precoder demapper as a priori input. The Precoder demapper exploits these LLR values and generates the enhanced extrinsic information for the next iteration.

EXIT Chart Analysis

EXIT chart analysis is used in the iteratively decoded system and is based on examining the convergence behavior of the system as discussed in [40]. For analyzing the convergence behavior, the system exploits the MI between the constituent decoder. In Fig. 2, Precoder decoder provides output and also receives input from both the SBC decoder and SP demapper. Here for any symbol $x$, the a priori LLR information is denoted by $L_ȧ(x)$ and its MI is given by $I_{,,A}(x)$. The MI between the corresponding symbol $x$ and extrinsic LLR information $L_ė(x)$ is represented by $I_(.,E) (x)$.
The inner decoder receives two a priori LLR inputs, that are $L_a^2 (s')$ and $L_a^2 (r)$. The first a priori LLR input $L_a^2 (s')$ is generated by the SBC decoder with $s'$ coded bits. The second a priori LLR input $L_a^2 (r)$ is yielded by the SP demapper with r coded bits. Similarly, the Precoder decoder provides two extrinsic LLR outputs, $L_e^2 (s')$ and $L_e^2 (r)$ representing $s'$ and $r$ coded bits respectively as shown in Fig. 2. The EXIT functions for the Precoder decoder are given by $F_{s'} [L_a^2 (r),L_a^2 (s') ]$ and $F_r [L_a^2 (r),L_a^2 (s')]$ for coded bits $s'$ and $r$, respectively. The EXIT function for SP demapper and SBC decoder is $F_{r'} [L_a^3 (r'),E_b⁄N_0 ]$ and $F_s [L_a^1 (s)]$, respectively.
The open EXIT tunnel condition between the constituent curves as discussed in [39] should be satisfied in order to obtain lower BER as portrayed in Fig. 5. The outer decoder during the iterative decoding provides the highest possible extrinsic information I_E (outer)=1 for the input a priori LLR information as shown in Fig. 5.

Fig. 5. DSTS-SP-Precoder-SBC simulated EXIT curves with decoding trajectories at $E_b⁄N_0$ values of 8–13 dB.

In our proposed system, the SBC (inner) decoder and Precoder (outer) decoder are considered as one combined model termed as the SISO module for EXIT analysis. Fig. 6 represents EXIT curves along with the decoding trajectories of benchmarker $DSTS-SP-Precoder-SBC_{[2\mkern18mu6]}^*$ scheme having $d_{H,min}=1$ for the $E_b⁄N_0$ values of 8–13 dB. From Fig. 6, it is observable that the EXIT curves for the combined outer SISO module is unable to attain the perfect convergence point (1,1), indicating that infinitesimal BER cannot be achieved.
The EXIT curves along with the decoding trajectories of the SISO module for the $DSTS-SP-Precoder-SBC_([2\mkern18mu6])$ scheme with $d_{H,min}=3$ for the $E_b⁄N_0$ values of 8–13 dB is shown in Fig. 5. It is plausible from Fig. 5 that the $DSTS-SP-Precoder-SBC_[2\mkern18mu6]$ scheme reaches to the perfect convergence (1,1) point on the EXIT chart. The staircase decoding trajectories provided by the Monte-Carlo simulations for the considered $E_b⁄N_0$ values are shown in both Figs. 5 and 6. In our iterative decoding setup, these trajectories provide MI during the bit-by-bit Monte-Carlo simulations at the output and input of both outer SISO module and SP demapper. Decoding trajectories of Fig. 5 also indicates that the DSTS-SP-Precoder-SBC scheme iteratively achieves the highest extrinsic LLR values of $I_E=1$ for $E_b⁄N_0$ values higher than 8 dB. However, the $DSTS-SP-Precoder-SBC_{[2\mkern18mu6]}^*$ scheme is unable to achieve the $I_E=1$ value due to the intersection of inner and outer EXIT curves at a point prior to (1,1).

Fig. 6. $DSTS-SP-Precoder-SBC_{[2\mkern18mu6]}^*$ simulated EXIT curves with decoding trajectories at $E_b⁄N_0$ values of 8–13 dB.

System Performance and Simulation Results

The H.264/AVC is the source codec used in our proposed scheme as shown in Fig. 2 and system parameters associated with our proposed design are discussed in Table 3. We have used the “Akiyo” video sequence having 45 frames sequence with a pixel resolution of (174×144) encoded at a frame rate of 15 frames per second (fps) in quarter common intermediate format (QCIF) with a bit rate of 64 kbps. Each QCIF frame is partitioned into 9 slices, each of which contains 11 MB. To minimize and stop the propagation of errors, two intra-coded “I” frames are sent, after every 44 “P” frames or predicted frames consecutively. The other parameters used in our video codec are intra frame MB update, variable length coding and quarter pixel motion estimation. In each QCIF frame, DP and intra-frame MB updates are incorporated to attain the error resilience feature. The bi-directional predicted B pictures are avoided in the setup because of its delay and loss of lip synchronization in the final decoded video. Additionally, motion search was limited to only preceding QCIF frames to decrease the complexity of the decoding scheme. Furthermore, to design real time transmission system and to keep the complexity of the proposed communication system low, flexible macroblock ordering (FMO) was not used as it is unable to provide significant improvement despite its large added complexity.
Fig. 7 represents the BER performance of various schemes employing different SBC rates as given in Table 4. Fig. 7 clearly advocates that $DSTS-SP-Precoder-SBC_([5\mkern18mu15])$ scheme provides better BER performance in comparison to the other schemes due to its $d_{H,min}$=6 value. Additionally, the $DSTS-SP-Precoder-SBC_([2\mkern18mu6])^*$ scheme yields the worst BER due to the smaller $d_{H,min}=1$ value, as governed by the EXIT chart analysis in which perfect convergence was not attained by the said scheme.

Fig. 7. BER performance curves for the proposed error protection schemes of Table 4.

Fig. 8. PSNR performance curves for the proposed error protection schemes of Table 4.

Furthermore, Fig. 8 represents the PSNR curves of different SBC schemes presented in Table 4. It is depicted in Fig. 7 that $DSTS-SP-Precoder-SBC_([5\mkern18mu15])$ scheme having Rate-1/3 gives the best PSNR performance. $DSTS-SP-Precoder-SBC_{[5\mkern18mu15]}$ scheme having $d_{H,min}=6$ gives an $E_b⁄N_0$ gain of 22 dB compared to the benchmarker at the PSNR degradation point of 2 dB as shown in Fig. 8.
Finally, Fig. 9 represents the subjective video quality performance of different error protection schemes by repeating the overall system iteration 30 times. It is visible that the performance of $DSTS-SP-Precoder-SBC_{[5\mkern18mu15]}$ scheme is significantly better at lower $E_b⁄N_0$ value of 9.5 dB in comparison to the benchmarker. The $DSTS-SP-Precoder-SBC_{[2\mkern18mu6]}^*$ benchmarker results in the worst subjective video quality as impairments are seen even at higher $E_b⁄N_0$ values of 28–29.5 dB as shown in Fig. 9.

Fig. 9. Subjective video quality of the 45th “Akiyo” video sequence frame using(from top) $DSTS-SP-Precoder-SBC_{[5\mkern18mu15]}$ and $DSTS-SP-Precoder-SBC_{[2\mkern18mu6]}^*$ schemes at $E_b⁄N_0$ values of (from left) 8.0, 8.5, 9, and 9.5 dB for $DSTS-SP-Precoder-SBC_{[5\mkern18mu15]}$ and 28, 28.5, 29, and 29.5 dB for $DSTS-SP-Precoder-SBC_{[2\mkern18mu6]}^*$.

Conclusion

A three-stage video transmission system is presented in this article with an iteratively decoded SBC and SP aided DSTS MIMO scheme. The proposed joint source-channel system utilizing the H.264/AVC achieves near capacity performance. With the employment of SBC scheme, artificial redundancy is incorporated in the designed system due to which significant improvements in the PSNR and BER is observed. The three-stage iteratively decoded benchmarker $DSTS-SP-Precoder-SBC_{[2\mkern18mu6]}^*$ scheme having $d_{H,min}=1$ has no artificial redundancy and results in non-perfect convergence as it is unable to reach the (1, 1) point on the EXIT chart. However, the $DSTS-SP-Precoder-SBC_{[5\mkern18mu15]}$ having $d_{H,min}=6$ yields perfect convergence as the constituent curves intersect at the (1, 1) point on the EXIT chart. Our proposed $DSTS-SP-Precoder-SBC_{[5\mkern18mu15]}$ scheme experiences a noticeable performance improvement of about 22 dB at the PSNR degradation of 2 dB, when compared to the $DSTS-SP-Precoder-SBC_{[2\mkern18mu6]}^*$ benchmarker having $d_{H,min}=1$, for the narrowband Rayleigh fading channel. The design insights of this work is that the iterative decoding becomes much beneficial and results in an enhanced performance for the higher values of $d_{H,min}$. In future, we aim to subsume the convolutional neural networks and deep learning approaches for estimating the statistical behavior of channel and characterizing the added noise.

Acknowledgements

Work accomplished under the research project NCBC-UET Peshawar, in the field of Multimedia Streaming and Analytics.

Author’s Contributions

Conceptualization, AK, NM, IA; Funding acquisition, JF, JN; Investigation and methodology, AK, IA, KU; Project administration, NM; Resources, IA; Supervision, NM; Writing of the original draft, AK, IA; Writing of the review and editing, IA; Software, AK, JN; Validation, NM, IA, KU, JF; Formal Analysis, AK, JF, KU; Data curation, IA, JN; Visualization, NM, IA, JF. All the authors have proofread the final version.

Funding

Competing Interests

The authors declare that they have no competing interests.

Authors Biography

Affiliation : Department of Computer Systems Engineering, University of Engineering and Technology, Peshawar, Pakistan
Biography : Amaad Khalil received the B.Sc. degree in computer engineering from the University of Engineering and Technology, Peshawar, Pakistan, in 2010, the M.Sc. degree in computer engineering from computer engineering from the University of Engineering and Technology, Peshawar, Pakistan, in 2013, and now pursuing Ph.D. degree in computer engineering from the University of Engineering and Technology, Peshawar. He is currently working as Lecturer with the Department of Computer Systems Engineering, University of Engineering and Technology Peshawar. His research interests include embedded systems, error correction codes, and low-bit-rate video coding for wireless communications.

Name : Nasru Minallah
Affiliation : Department of Computer Systems Engineering, University of Engineering and Technology, Peshawar, Pakistan
Biography : Nasru Minallah received the B.Sc. degree in computer engineering from the University of Engineering and Technology, Peshawar, Pakistan, in 2004 and the M.Sc. degree in computer engineering from Lahore University of Management Sciences, Lahore, Pakistan, in 2006 and Ph.D. degree from the Communications Group, School of Electronics and Computer Science, University of Southampton, Southampton, U.K.in 2010. He is currently working as Associate Professor in Department of Computer Systems Engineering, University of Engineering and Technology Peshawar, Pakistan. His research interests include Image Processing, Remote Sensing, low-bit-rate video coding for wireless communications.

Name : Ishtiaque Ahmed
Affiliation : National Centre of Big Data and Cloud Computing (NCBC), UET Peshawar, Pakistan
Biography : Ishtiaque Ahmed completed his B.Sc. in Electrical Engineering with specialization in Telecommunication from COMSATS University Islamabad, Pakistan in 2018. He is currently serving as a Research Assistant in the National Center of Big Data and Cloud Computing, University of Engineering and Technology Peshawar (NCBC-UETP) Pakistan. His research interest includes wireless communication, channel coding, low-bit-rate video encoding, multimedia streaming, distributed generation, and smart grids management and privacy.

Affiliation : National Centre of Big Data and Cloud Computing (NCBC), UET Peshawar, Pakistan
Biography : Khadem Ullah received B.Sc. degree in Computer Systems Engineering from the University of Engineering and Technology (CSE-UET), Peshawar, Pakistan in 2018. He is currently pursuing his postgraduate studies at the department of CSE-UET Peshawar and working as a Research Assistant in the field of Multimedia Streaming at National Center of Big Data and Cloud Computing (NCBC), UET Peshawar, Pakistan. He has published international journal research articles in the field of wireless communication. His main research interests include incorporating Artificial Intelligence/Machine learning in iterative source and channel decoding, Signal Processing and Communications, Underwater Wireless Sensors Networks (UWSNs), Cloud Computing, and Computer Security.

Name : Jaroslav Frnda
Affiliation : Department of Quantitative Methods and Economic Informatics, Faculty of Operation and Economics of Transport and Communication, University of Zilina, Zilina, Slovakia
Biography : Jaroslav Frnda was born in 1989 in Slovakia. He received his M.Sc. and Ph.D. from the VSB–Technical University of Ostrava (Czechia), Department of Telecommunications, in 2013 and 2018 respectively. Now he works as an assistant professor at the University of Zilina in Slovakia. His research interests include Quality of multimedia services in IP networks, data analysis and machine learning algorithms. In 2021, he was elevated to IEEE Senior Member grade. He has authored and co-authored 17 SCI-E and 9 ESCI papers in WoS.

Name : Jan Nedoma
Affiliation : Department of Telecommunications, Faculty of Electrical Engineering and Computer Science, VSB-Technical University of Ostrava, Ostrava-Poruba, Czech Republic
Biography : Jan Nedoma was born in 1988 in the Czech Republic. In 2014 he received his Masters's degree in Information and Communication Technology from the Technical University of Ostrava. Since 2014 he has worked here as a Research Fellow. In2018 he successfully defended his dissertation thesis and worked as an assistant professor at the same University. He has become an Associate Professor in CommunicationTechnologies in 2021 after defending the habilitation thesis titled 'Fiber-optic sensors in biomedicine: Monitoring of vital functions of the human body in Magnetic Resonance (MR) environment'. Area of scientific interest: Optical communications, optical atmospheric communications, optoelectronics, optical measurements, measurements in telecommunication technology, fiber-optic sensory systems. Data processing from fiber-optic sensors, the use of fiber-optic sensors within the SMART technological concepts (Smart Home, Smart Home Care, Intelligent Building, Smart Grids, Smart Metering, Smart Cities, etc.) and for the needs of Industry 4.0. He has more than 150 journal and conference articles in his research areas and 9 valid patents.

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Amaad Khalil1, Nasru Minallah1, Ishtiaque Ahmed2, Khadem Ullah2, Jaroslav Frnda3,4,*, and Jan Nedoma4, Robust Mobile Video Transmission Using DSTS-SP via Three-Stage Iterative Joint Source-Channel Decoding, Article number: 11:42 (2021) Cite this article 2 Accesses